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FDS6912
July 2000
FDS6912
Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET
General Description
These N-Channel Logic Level MOSFETs have been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. These MOSFETs feature faster switching and lower gate charge than other MOSFETs with comparable RDS(ON) specifications. The result is a MOSFET that is easy and safer to drive (even at very high frequencies), and DC/DC power supply designs with higher overall efficiency.
Features
* 6 A, 30 V. RDS(ON) = 0.028 @ VGS = 10 V RDS(ON) = 0.042 @ VGS = 4.5 V.
* Optimized for use in switching DC/DC converters with PWM controllers * Very fast switching. * Low gate charge
D1 D1 D2 D2 S1 G1
5 6 7
Q1
4 3 2
Q2
SO-8
S2
8
1
G2
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed
TA=25 C unless otherwise noted
o
Parameter
Ratings
30 25
(Note 1a)
Units
V V A W
6 20 2
Power Dissipation for Dual Operation Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c)
1.6 1 0.9 -55 to +150 C
TJ, Tstg
Operating and Storage Junction Temperature Range
Thermal Characteristics
RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
78 40
C/W C/W
Package Marking and Ordering Information
Device Marking FDS6912 Device FDS6912 Reel Size 13'' Tape width 12mm Quantity 2500 units
2000 Fairchild Semiconductor Corporation
FDS6912 Rev F (W)
FDS6912
Electrical Characteristics
Symbol
BVDSS BVDSS TJ IDSS IGSSF IGSSR
TA = 25C unless otherwise noted
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, Forward Gate-Body Leakage, Reverse
(Note 2)
Test Conditions
VGS = 0 V, ID = 250 A ID = 250 A, Referenced to 25C VDS = 24 V, VGS = 25 V, VGS = -25 V VGS = 0 V TJ = 55C VDS = 0 V VDS = 0 V
Min
30
Typ
Max Units
V
Off Characteristics
20 1 10 100 -100 mV/C A nA nA
On Characteristics
VGS(th) VGS(th) TJ RDS(on)
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance
VDS = VGS, ID = 250 A ID = 250 A, Referenced to 25C VGS = 10 V, VGS = 4.5 V, ID = 6 A TJ = 125C ID = 4.9 A VDS = 5 V ID = 6 A
1
2 -5 0.024 0.034 0.035
3
V mV/C
0.028 0.048 0.042
ID(on) gFS
VGS = 10 V, VDS = 10 V,
20 20
A S
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note 2)
VDS = 15 V, f = 1.0 MHz
V GS = 0 V,
740 170 75
pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
VDD = 15 V, VGS = 10 V,
ID = 1 A, RGEN = 6
8 13 18 8
16 24 29 16 10
ns ns ns ns nC nC nC
VDS = 10 V, VGS = 5 V
ID = 6 A,
7 3.8 2.5
Drain-Source Diode Characteristics and Maximum Ratings
IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A
(Note 2)
1.3 0.75 1.2
A V
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a) 78/W when 2 mounted on a 0.5in pad of 2 oz copper
b) 125/W when mounted on a 0.02 2 in pad of 2 oz copper
c) 135/W when mounted on a minimum mounting pad.
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%
FDS6912 Rev E (W)
FDS6912
Typical Characteristics
30
VGS = 10V
24 I , DRAIN-SOUR CE CURREN T (A)
6.0V 5.0V 4.5V
2 1.8 1.6 V GS = 4.0V
18
4.0V
12
1.4 1.2 1
4.5V 5.0V
3.5V
6.0V 7.0V 10V
D
6
3.0V
0 0 1 1 2 2 V DS, D RAIN-SOUR CE VOL TAGE (V) 3 3
0.8 0 10 20 30 40 50
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
8
1.6 1.5 DRAIN-SOURCE ON-RESISTANCE 1.4 1.3 1.2 1.1 1.0 0.9 0.8
R DS(ON) ,NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID = 6.3A V GS =10V
R DS(ON) ,(OHM)
I = 3.0A
7
D
6
5
TA = 125 C
4
o
3
2
0.7 0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150
1 2 4 V
GS
25 o C
6 ,GATE-SOURCE VOLTAGE (V) 8 10
Figure 3. On-Resistance Variation withTemperature.
20
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
100
VDS = 5V
I D , DRAIN CURRENT (A) 15
TJ = -55C
25C 125C
10
VGS = 0V
TA = 125 C 1 25 C
o
o
10
0.1 0.01
-55 C
o
5
0.001 0.0001
0
0 1 2 3 4 V GS , GATE TO SOURCE VOLTAGE (V) 5
0.4
0.8
1.2
1.6
V SD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDS6912 Rev E (W)
FDS6912
Typical Characteristics (continued)
10 ID = 6.3A 8 15V 6 VDS = 5V 10V
2000
CAPACITANCE (pF)
1000 500
C iss
4
C oss
200 80
2
f = 1 MHz VGS = 0V
0.1 0.3 1 3 10
C rss
30
0 0 4 8 Qg, GATE CHARGE (nC) 12 16
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100
IT LIM
Figure 8. Capacitance Characteristics.
30
20 I D , DRAIN CURRENT (A) 10
N) S(O RD
1m s
10m s
100 us
25
20 POWER (W)
SINGLE PULSE R JA= 135C/W TA = 25
2 0.5
100
1s
VGS = 10V SINGLE PULSE RJA = 135 C/W TA = 25C
0.2 0.5 V
ms
15
10 s DC
10
0.05
5
0.01 0.1
DS
1 2 5 10 , DRAIN-SOURCE VOLTAGE (V)
20
0
0.01
0.1
1 10 SINGLE PULSE TIME (SEC)
100
1000
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
1
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001
D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse P(pk)
R JA (t) = r(t) * R JA R JA = 135C/W
t1
t2
TJ - TA = P * R JA (t) Duty Cycle, D = t1 /t2
0.001 0.01 0.1 t 1, TIME (sec) 1 10 100 300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
FDS6912 Rev E (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4

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